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PD - 95448
SMPS MOSFET
Applications High Frequency Isolated DC-DC Converters with Synchronous Rectification for Telecom and Industrial Use l High Frequency Buck Converters for Computer Processor Power l Active Oring l Lead-Free
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IRL3716PbF IRL3716SPBF IRL3716LPbF
HEXFET(R) Power MOSFET
VDSS
20V
RDS(on) max
4.0m
ID
180A
Benefits Ultra-Low Gate Impedance l Very Low RDS(on) at 4.5V VGS l Fully Characterized Avalanche Voltage and Current
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TO-220AB IRL3716
D2Pak IRL3716S
TO-262 IRL3716L
Absolute Maximum Ratings
Symbol
VDS VGS ID @ TC ID @ TC I DM PD @TC PD @TC
Parameter
Drain-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Maximum Power Dissipation Maximum Power Dissipation Linear Derating Factor Junction and Storage Temperature Range
Max.
20 20 180 130 720 210 100 1.4 -55 to + 175
Units
V V A W W W/C C
= 25C = 100C = 25C = 100C
TJ , TSTG
Thermal Resistance
Parameter
RJC RCS RJA RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient Junction-to-Ambient (PCB mount)
Typ.
--- 0.50 --- ---
Max.
0.72 --- 62 40
Units
C/W
Notes through are on page 11
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6/22/04
IRL3716/3716S/3716LPbF
Static @ TJ = 25C (unless otherwise specified)
Parameter Drain-to-Source Breakdown Voltage V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient V(BR)DSS RDS(on) VGS(th) IDSS IGSS Min. 20 --- --- Static Drain-to-Source On-Resistance --- Gate Threshold Voltage 1.0 --- Drain-to-Source Leakage Current --- Gate-to-Source Forward Leakage --- Gate-to-Source Reverse Leakage --- Typ. Max. Units Conditions --- --- V VGS = 0V, ID = 250A 0.021 --- V/C Reference to 25C, ID = 1mA 3.0 4.0 VGS = 10V, ID = 90A m 4.0 4.8 VGS = 4.5V, ID = 72A --- 3.0 V VDS = VGS, ID = 250A --- 20 VDS = 16V, VGS = 0V A --- 250 VDS = 16V, VGS = 0V, TJ = 125C --- 200 VGS = 16V nA --- -200 VGS = -16V
Dynamic @ TJ = 25C (unless otherwise specified)
Symbol
gfs Qg Qgs Qgd Qoss td(on) tr td(off) tf Ciss Coss Crss Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Output Gate Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Min. 100 --- --- --- --- --- --- --- --- --- --- --- Typ. --- 53 17 24 50 18 140 38 36 5090 3440 560 Max. Units Conditions --- S VDS = 10V, ID = 72A 79 ID = 72A 26 nC VDS = 16V 35 VGS = 4.5V 75 VGS = 0V, VDS = 10V --- VDD = 10V --- ID = 72A ns --- RG = 3.9 --- VGS = 4.5V --- VGS = 0V pF --- VDS = 10V --- = 1.0MHz
Avalanche Characteristics
Symbol
EAS IAR
Parameter
Single Pulse Avalanche Energy Avalanche Current
Typ.
--- ---
Max.
640 72
Units
mJ A
Diode Characteristics
Symbol
IS
I SM
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Reverse Reverse Reverse Recovery Recovery Recovery Recovery Time Charge Time Charge
Min. Typ. Max. Units --- --- --- --- --- --- --- --- --- 180 --- 0.93 0.80 180 87 190 85 720 1.3 --- 280 130 280 130 V ns nC ns nC A
VSD trr Q rr trr Q rr
Conditions D MOSFET symbol showing the G integral reverse S p-n junction diode. TJ = 25C, IS = 72A, VGS = 0V TJ = 125C, IS = 72A, VGS = 0V TJ = 25C, IF = 72A, VR=20V di/dt = 100A/s TJ = 125C, IF = 72A, VR=20V di/dt = 100A/s
2
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IRL3716/3716S/3716LPbF
10000
VGS 10V 4.5V 3.7V 3.5V 3.3V 3.0V 2.7V BOTTOM 2.5V TOP
10000
ID, Drain-to-Source Current (A)
1000
ID, Drain-to-Source Current (A)
1000
VGS 10V 4.5V 3.7V 3.5V 3.3V 3.0V 2.7V BOTTOM 2.5V TOP
100
100
2.5V
10
10
2.5V 20s PULSE WIDTH Tj = 25C
20s PULSE WIDTH Tj = 175C
1 0.1 1 10 100
1 0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000.00
2.0
I D = 180A
ID, Drain-to-Source Current ()
T J = 25C T J = 175C
RDS(on) , Drain-to-Source On Resistance
1.5
100.00
(Normalized)
1.0
0.5
10.00 2.0 3.0 4.0
VDS = 15V 20s PULSE WIDTH
5.0 6.0 7.0 8.0
0.0 -60 -40 -20 0 20 40 60 80
V GS = 10V
100 120 140 160 180
VGS, Gate-to-Source Voltage (V)
TJ , Junction Temperature
( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRL3716/3716S/3716LPbF
100000 VGS = 0V, f = 1 MHZ Ciss = C + C , C gs gd ds SHORTED Crss = C gd Coss = C + C ds gd 10000
VGS , Gate-to-Source Voltage (V)
16
ID = 72A VDS = 16V
12
C, Capacitance(pF)
Ciss Coss
8
1000
Crss
4
100 1 10 100
0 0 30 60 90 120 150
VDS , Drain-to-Source Voltage (V)
QG, Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
10000 OPERATION IN THIS AREA LIMITED BY R DS(on)
100
TJ = 175 C
ID , Drain-to-Source Current (A)
1000
I SD, Reverse Drain Current (A)
10
T = 25 C J
100
100sec 1msec
1
10 Tc = 25C Tj = 175C Single Pulse 1 10
10msec
0.1 0.2 0.8 1.4
V GS= 0 V
2.0 2.6
1
100
V SD,Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRL3716/3716S/3716LPbF
180
LIMITED BY PACKAGE
150
V DS VGS RG
RD
D.U.T.
+
120
-VDD
I D , Drain Current (A)
4.5V
90
Pulse Width 1 s Duty Factor 0.1 %
60
Fig 10a. Switching Time Test Circuit
VDS 90%
30
0 25 50 75 100 125 150 175
TC , Case Temperature
( C)
Fig 9. Maximum Drain Current Vs. Case Temperature
10% VGS
td(on) tr t d(off) tf
Fig 10b. Switching Time Waveforms
10
(Z thJC )
1
Thermal Response
D = 0.50
0.20 0.1 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) Notes: 1. Duty factor D = 2. Peak T 0.01 0.00001 0.0001 0.001 0.01
P DM t1 t2
t1/ t 2 +TC 1
J = P DM x Z thJC
0.1
t 1, Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRL3716/3716S/3716LPbF
15V
1650
TOP
ID 29A 51A 72A
RG
20V
D.U.T
IAS tp
EAS , Single Pulse Avalanche Energy (mJ)
VDS
L
DRIVER
1320
BOTTOM
+ V - DD
990
A
0.01
660
Fig 12a. Unclamped Inductive Test Circuit
330
V(BR)DSS tp
0 25 50 75 100 125 150 175
Starting Tj, Junction Temperature
( C)
I AS
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
QG
50K 12V .2F .3F
4.5 V
QGS
QGD
VGS
3mA
D.U.T.
+ V - DS
VG
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
6
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IRL3716/3716S/3716LPbF
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET(R) Power MOSFETs
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IRL3716/3716S/3716LPbF
TO-220AB Package Outline
10.54 (.415) 10.29 (.405) 3.78 (.149) 3.54 (.139) -A6.47 (.255) 6.10 (.240)
Dimensions are shown in millimeters (inches)
-B4.69 (.185) 4.20 (.165) 1.32 (.052) 1.22 (.048)
2.87 (.113) 2.62 (.103)
4 15.24 (.600) 14.84 (.584)
1.15 (.045) MIN 1 2 3
LEAD ASSIGNMENTS IGBTs, CoPACK 1 - GATE 2 1- GATE- DRAIN 1- GATE 32- DRAINSOURCE 2- COLLECTOR 3- SOURCE 3- EMITTER 4 - DRAIN
LEAD ASSIGNMENTS
HEXFET
14.09 (.555) 13.47 (.530)
4- DRAIN
4.06 (.160) 3.55 (.140)
4- COLLECTOR
3X 3X 1.40 (.055) 1.15 (.045)
0.93 (.037) 0.69 (.027) M BAM
3X
0.55 (.022) 0.46 (.018)
0.36 (.014)
2.54 (.100) 2X NOTES: 1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982. 2 CONTROLLING DIMENSION : INCH
2.92 (.115) 2.64 (.104)
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB. 4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
E XAMPL E : T HIS IS AN IR F 1010 L OT CODE 1789 AS S E MB L E D ON WW 19, 1997 IN T H E AS S E MB L Y L INE "C" INT E R NAT IONAL R E CT IF IE R L OGO AS S E MB L Y L OT CODE PAR T NU MB E R
Note: "P" in assembly line position indicates "Lead-Free"
DAT E CODE YE AR 7 = 1997 WE E K 19 L INE C
8
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IRL3716/3716S/3716LPbF
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information (Lead-Free)
T H IS IS AN IR F 5 3 0 S W IT H L OT COD E 80 2 4 AS S E M B L E D ON W W 0 2, 20 00 IN T H E AS S E M B L Y L IN E "L " N ote: "P " in as s em bly lin e po s itio n in dicates "L ead-F r ee" IN T E R N AT IO N AL R E C T IF IE R L OGO AS S E M B L Y L O T CO D E P AR T N U M B E R F 5 30 S D AT E C O D E Y E AR 0 = 2 0 0 0 W E E K 02 L IN E L
OR
IN T E R N AT IO N AL R E C T IF IE R L O GO AS S E M B L Y L OT COD E P AR T N U M B E R F 530S D AT E CO D E P = D E S IG N AT E S L E AD -F R E E P R O D U C T (O P T IO N AL ) Y E AR 0 = 2 0 0 0 W E E K 02 A = AS S E M B L Y S IT E CO D E
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IRL3716/3716S/3716LPbF
TO-262 Package Outline
IGBT 1- GATE 2- COLLECTOR 3- EMITTER
TO-262 Part Marking Information
EXAMPLE: T HIS IS AN IRL3103L LOT CODE 1789 AS SEMBLED ON WW 19, 1997 IN T HE ASS EMBLY LINE "C" Note: "P" in as s embly line pos ition indicates "Lead-Free" INTERNAT IONAL RECT IFIER LOGO AS S EMBLY LOT CODE PART NUMBER
DATE CODE YEAR 7 = 1997 WEEK 19 LINE C
OR
INT ERNAT IONAL RECT IFIER LOGO ASS EMBLY LOT CODE PART NUMBER DAT E CODE P = DES IGNAT ES LEAD-FREE PRODUCT (OPTIONAL) YEAR 7 = 1997 WEEK 19 A = AS SEMBLY S ITE CODE
10
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IRL3716/3716S/3716LPbF
D2Pak Tape & Reel Infomation
TRR
1.60 (.063) 1.50 (.059) 4.10 (.161) 3.90 (.153)
1.60 (.063) 1.50 (.059)
0.368 (.0145) 0.342 (.0135)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
11.60 (.457) 11.40 (.449)
15.42 (.609) 15.22 (.601)
24.30 (.957) 23.90 (.941)
TRL
10.90 (.429) 10.70 (.421) 1.75 (.069) 1.25 (.049) 16.10 (.634) 15.90 (.626) 4.72 (.136) 4.52 (.178)
FEED DIRECTION
13.50 (.532) 12.80 (.504)
27.40 (1.079) 23.90 (.941)
4
330.00 (14.173) MAX.
60.00 (2.362) MIN.
NOTES : 1. COMFORMS TO EIA-418. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION MEASURED @ HUB. 4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039) 24.40 (.961)
30.40 (1.197) MAX. 4
3
Notes:
Repetitive rating; pulse width limited by
max. junction temperature.
Pulse width 400s; duty cycle 2%. This is only applied to TO-220AB package
Starting TJ = 25C, L = 0.25mH
RG = 25, IAS = 72A.
This is applied to D2Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ). Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 75A.
For recommended footprint and soldering techniques refer to application note #AN-994.
Data and specifications subject to change without notice. This product has been designed and qualified for the Industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.06/04
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11
Note: For the most current drawings please refer to the IR website at: http://www.irf.com/package/

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